Non-volatile memories represented by NAND type flash memories have been widely used for mobile phones, digital still cameras, Universal Serial Bus (USB) memories, silicon audios, and the like to store a large amount of data, and its market further continuously expand by a rapid shrinkage to reduce a manufacturing cost per bit. However, it is said that the NAND type flash memories may have a limit in further enhancement of high uniformity, high reliability, high speed operation of transistor properties, and high integration of transistors when scaling is further promoted because the NAND type flash memories make use of a transistor operation which records information by a variation of a threshold value. Thus a novel non-volatile memory is demanded to break the limit.
As non-volatile memories for responding the demand, a phase-change memory (PCM) element and a resistive random access memory (ReRAM) element are exemplified. Since the phase-change memory element and the resistive random access memory element operate making use of a variable resistance state of a resistance material, the phase-change memory element and the resistive random access memory element have a feature that write/erase operations do not need a transistor operation and that more shrinkage of a size of a resistance material can lead to more improvement of properties of the element.
In a resistive random access memory, a plurality of resistance change elements are arranged in a matrix at a plurality of intersection position where a plurality of word lines extending in parallel with each other in a first direction intersect with a plurality of bit lines extending in parallel with each other in a second direction. Further, in the resistive random access memory, since sensing is performed by a current amount in a different way from a conventional NAND type flash memory, diodes (rectifying elements) for regulating a current direction from the word lines to the bits line are arranged in series to resistance change elements in respective memory cells.
When the non-volatile memory cells are arranged in a horizontal direction as described above, it is necessary to pattern the word lines and the bit lines by a different lithography process, respectively. In the case, to improve the arrangement density of the non-volatile memory cells, it is necessary to further increase the number of wiring layers and to stack a plurality of the horizontal arrangements of the non-volatile memory cells in a vertical direction. When the number of the wiring layers is increased, since the number of the lithography processes is increased, a cost reduction effect remains in a low level.